As Europe transitions to clean power sources, there is a need to transfer large amounts of power across long distances, in order to connect geographically-dispersed generation sources and loads. This will help to mitigate the intermittency of renewable generation through a diversity of sources and locations.

Superconducting high-voltage direct-current (HVDC) cables have been proposed as a means of transferring large amounts of power over long distances, and of connecting large offshore wind farms to the onshore electricity grid. Multi-terminal networks could increase flexibility and allow a high-capacity continent-wide transmission grid to be built. SuperNode Ltd. are developing the technologies to allow such a transmission grid to be built.

A key issue with the use of superconducting power cables is the behaviour of the cable, particularly during fault conditions, as the cable resistance can exhibit a strong non-linear relationship with current, which also depends strongly on temperature. How this interacts with the already tricky fault management of a multiterminal HVDC grid is an open question.

Power Hardware-in-the-Loop (PHIL) testing has been proposed by SuperNode, based on techniques developed within the University of Strathclyde, to evaluate the behaviour of superconducting cables within a multi-terminal HVDC network. In this case, a sample of real superconducting tape will be subject to a current representing that occurring in a cable that is part of a multi-terminal system simulated in real time, with the measured cable resistance fed back into a pi-section cable model.

Project Aims

The project built on early discussions between SuperNode and colleagues within the University, specifically the Department of Electronic & Electrical Engineering’s Power Electronics, Drives and Energy Conversion (PEDEC) group and the Applied Superconductivity Laboratory. PNDC were brought into the discussion based on our experience with PHIL techniques, and with a view to potentially using PNDC’s power supplies for demonstration of the concept in a follow-on project.

This project represents a study into the feasibility of the proposed PHIL approach, and aimed to answer the following questions:

Is the proposed PHIL approach feasible, and what are the limits in terms of loop delay in relation to parameters such as cable pi-section length?

What are the requirements for a power amplifier, in terms of voltage and current rating and response speed, and what model of power amplifier is recommended?

What are the requirements for a real-time simulator to meet the desired network complexity and simulation timestep?

What other components might be required to implement the full PHIL system?

The project was intended to lead to further work to demonstrate and de-risk the concept within the university, allowing SuperNode to implement the developed system at their premises.

PNDC’s Role

The project consisted of three phases. In the first phase, the PHIL system was simulated offline, which included a model of the superconductor as well as representing the loop delay of the simulation system and the bandwidth of the power amplifier. This was simulated using both a simple and a full HVDC converter station model in MATLAB/Simulink, and compared with a simplified analytical model. The purpose of this was to determine whether the proposed approach was stable, and parameters affecting the stability including the length of the cable section, controller bandwidth and simulation delay.

In the second phase, cable and converter stations were run on PNDC’s OPAL-RT real-time simulator, as well as in the Simulink Desktop Real-Time environment, in order to gauge the computation requirements of the models. This was used to recommend models of real-time simulator from various vendors, which would be capable of running the required models at a suitable time step.

Finally, possible options for the other components including the power amplifier and transducers were considered. A power supply was recommended based on the required controller bandwidth calculated in the fist phase, as well as voltage and current ratings based on the scaled voltage and current for the superconductor sample of interest.

The project utilised PNDC’s OPAL-RT real-time simulator, which was used to determine the processor load required to run HVDC network models of varying complexity, in order to be able to advise on the simulator performance requirement.

Hardware-in-the-Loop testing of superconducting HVDC cables - PiMultiModel Cable1 Simulink

Hardware-in-the-Loop testing of superconducting HVDC cables - System Voltage - Sample Current - Sample Resistance

Project Outcomes

For a typical simulation timestep of 20μs, and the minimum single timestep delay, a power amplifier bandwidth of 4.5kHz will be adequate to simulate a 5km pi-section length. If the simulator delay is longer, then a considerably higher power supply bandwidth will be required, although with a 10km pi-section length the requirements are considerably relaxed.

The required power amplifier bandwidth can be met by a model of switchmode DC power supply used by PNDC, a higher bandwidth would require a linear power amplifier with a considerably higher cost and lower current capability.

The multiterminal HVDC grid of interest could be simulated using a simulator with four CPU cores, representing a low-end system.

Hardware-in-the-Loop testing of superconducting HVCDC cables concept development - Dr Max Marker

Through our collaboration with SuperNode, PNDC applied its expertise in Power Hardware-in-the-Loop (PHIL) and real-time simulation to validate the feasibility of superconducting HVDC cable testing — helping to de-risk a key step toward the development of future multi-terminal HVDC grids. Work to demonstrate the concept is currently ongoing within the University of Strathclyde, with continued support from PNDC.

Dr Max Parker

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